(a) Field of the Invention
The present invention relates to a plasma display device and a voltage generator thereof.
(b) Description of the Related Art
A plasma display device is a flat panel display that uses plasma generated by a gas discharge to display characters or images. It includes a plasma display panel (PDP) wherein hundreds of thousands to millions of discharge cells (hereinafter referred to as cells) are arranged in a matrix format, depending on its size.
The plasma display device is driven by dividing one frame into a plurality of subfields, each having a weight. In this case, each subfield includes a reset period, an address period, and a sustain period in a temporal manner.
The reset period is for initializing the status of each cell so as to facilitate an addressing operation on the cell, and the address period is for performing an addressing operation so as to select turn-on/turn-off cells (i.e., cells to be turned on/off). The sustain period is for causing a discharge for displaying an image on the addressed cells.
In general, the reset period is formed of a rising period and a falling period. In this case, during the rising period of the reset period, a voltage of a scan electrode is gradually increased to a reset maximum voltage so as to form many wall charges in all the cells. After that, during the falling period of the reset period, the voltage of the scan electrode is gradually decreased to a reset minimum voltage to erase the wall charges so that a wall charge state of each cell becomes appropriate for the addressing operation in the address period. Then, during the addressing period, a scan pulse and an address pulse are respectively applied to a scan electrode and an address electrode of a turn-on cell so as to select the turn-on cell.
However, when a temperature of the plasma display device is high, characteristics of elements included in a driver, which applies a driving voltage to a plasma display panel (PDP), are changed. Particularly, a characteristic of a threshold voltage of a switch, which forms a path through which the voltage of the scan electrode is gradually decreased to the reset minimum voltage, is changed. In general, the threshold voltage of the switch, which forms the path through which a falling waveform is applied, is decreased at a high temperature. Therefore, a slope of the falling waveform becomes steeper at a high temperature than at room temperature. In addition, since wall charges in each cell become more active at a high temperature, more wall charges are erased at a high temperature than at room temperature. Accordingly, an address discharge may not be properly generated in the address period, thereby problematically causing a low discharge.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.